Introduction
Similar to the simple serial data communication example, CAN uses 2 wires to transmit data. However, instead of using a clock and data wire, CAN uses CAN High and CAN Low wires to simultaneously transmit data. The timing and synchronization is left to the protocol.
CAN H And CAN L
The naming of these circuits is actually pretty intuitive. The CAN H wire increases in voltage to indicate a state change, while the CAN L wire decreases in voltage. When the bus is idle, both wires are at the same voltage. Since CAN H and CAN L change states simultaneously, the CAN waveform looks like a mirror image, with the CAN H signal going up from 2.5 V to 3.5 V while the CAN L signal is going down from 2.5 V to 1.5 V.
1's And 0's
The interesting thing about CAN is that you would think that when the CAN H and CAN L signals diverge from the idle 2.5 V idle state to their respective higher and lower voltages, this would be representative of transmitting a binary 1. However, it's exactly the opposite. When the bus is idle, that is both CAN H and CAN L are at 2.5 V, this is used to represent a binary 1. When CAN H and CAN L diverge, this is used to represent a binary 0. This inverted logic is very important as it's what allows CAN to have multiple nodes randomly transmitting at the same time without any loss of data. This process is called arbitration and will not be covered in this article.
Dominant And Recessive
With CAN, we sometimes refer to dominant or recessive bus states. Understanding this is important when we talk about arbitration later on. Intuitively, you would probably think that a binary 1 is dominant and a binary 0 is recessive. However, once again, it's exactly the opposite. When the bus is idle, or both CAN H and CAN L are at 2.5 V, this represents a binary 1 and is referred to as the recessive state. When CAN H and CAN L diverge, this represents a binary 0 and is referred to as the dominant state. Since all the nodes are 'listening' to the bus as they are transmitting, they can detect when they are transmitting a recessive 1 while another node is transmitting a dominant 0. If a node sees the CAN H and CAN L voltage diverge while it's transmitting a recessive 1, that node knows to stop transmitting because a message with higher priority is being sent to the bus. The losing node can try to send it's message after the higher priority message has finished transmitting.
